• Eric Keller . Programming Model for Network Processing on an FPGA. M.S. Thesis at University of Massachusetts directed by Dr. Russell Tessier. Amherst, MA, October, 2004. ( pdf , presentation-ppt )

• Eric Keller and Gordon Brebner. Programming a Hyper-Programmable Architectures for Networked Systems. International Conference on Field-Programmable Technology (FPT). Brisbane, Australia, December 6-8, 2004. ( pdf , presentation-ppt - Note: the paper was presented as part of a key note address and includes additional, more general, material )

• Gordon Brebner, Phil James-Roxby, Eric Keller, Chidamber Kulkarni. Hyper-Programmable Architectures for Adaptable Networked Systems. IEEE 15th International Conference on Application-specific Systems, Architectures and Processors (ASAP). Galveston, TX, September 27-29, 2004. ( pdf )

• Eric Keller, Gordon Brebner, Phil James-Roxby. Software Decelerators. 13th International Field Programmable Logic and Applications Conference (FPL). Lisbon, Portugal, September 1-3, 2003. Lecture Notes in Computer Science 2778. (pdf, ps, presentation-ppt)

• Brandon Blodget, Philip James-Roxby, Eric Keller, Scott McMillan, Prasanna Sundararajaran. A Self-Reconfiguring Platform. 13th International Field Programmable Logic and Applications Conference (FPL). Lisbon, Portugal, September 1-3, 2003. Lecture Notes in Computer Science 2778. (pdf, ps, presentation-ppt)

• Jonathan Ballagh, James Hwang, Phil James-Roxby, Eric Keller.  Building OPB Slave Peripherals Using System Generator for DSP. Xilinx Application Note XAPP264. November, 2002. (pdf)

• Eric Keller and Scott McMillan.  An FPGA Wire Data-Base for Run-Time Routers.  5th Military and Aerospace Applications of Programmable Devices and Technologies International Conference (MAPLD).  Laurel, Maryland. September 10-12, 2002. (pdf, ps, presentation-ppt)
  

• Steven A. Guccione and Eric Keller. Gene Matching Using JBits.  12th International Field-Programmable Logic and Applications Conference (FPL).  Monpellier, France, September 2-4 2002.  Lecture Notes in Computer Science  2438. (pdf, ps, presentation-ppt)

• Eric Keller. Building Asynchronous Circuits With JBits. 11th International Field-Programmable Logic and Applications Conference (FPL).  Belfast, Northern Ireland, UK., August 27-29 2001.  Lecture Notes in Computer Science 2147. (pdf, ps, presentation-ppt)
  

• Jonathan Ballagh, Peter Athanas, and Eric Keller. Run-Time Reconfigurable 2D Discrete Wavelet Transform Using JBits.  Reconfigurable Technology: FPGAs for Computing and Applications II, Proc. SPIE 4525, SPIE - The International Society for Optical Engineering.  Denver, Colorado. August 21-22, 2001. (pdf, ps, presentation-ppt)
  

• Jonathan Ballagh, Peter Athanas, and Eric Keller. Java Debug Hardware Models using JBits. 8th Reconfigurable Architectures Workshop (RAW 2001), San Francisco, California. April 27, 2001. (pdf, ps, presentation-ppt)
  

• Eric Keller. Dynamic Circuit Specialization of a CORDIC Processor. Reconfigurable Technology: FPGAs for Computing and Applications II, Proc. SPIE 4212, SPIE - The International Society for Optical Engineering.  Boston, Massachusetts. November 7-8, 2000. (pdf, ps, presentation-ppt)
  

• Eric Keller. JRoute: A Run-Time Routing API for FPGA Hardware. 7th Reconfigurable Architectures Workshop (RAW 2000), Cancun, Mexico. May 1, 2000. (pdf, ps, presentation-ppt)
  

7,010,664 - "Configurable address generator and circuit using same", Ballagh, Keller, Milne. Granted Mar. 7, 2006.

6,920,627 - "Reconfiguration of a programmable logic device using internal control", Blodget, McMillan, James-Roxby, Sundararajan, Keller, Curd, Kalra, LeBlanc, Eck. Granted July 19, 2005.

6,883,147 - "Method and system for generating a circuit design including a peripheral component connected to a bus.", Ballagh, Milne, Stroomer, Keller, Hwang, James-Roxby. Granted Apr. 19, 2005.

6,725,441 - "Method and apparatus for defining and modifying connections between logic cores implemented on programmable logic devices." Keller, Patterson. Granted Apr. 20, 2004.

6,487,709 - "Run-Time Routing for Programmable Logic Devices." Keller, Guccione, Levi. Granted Nov. 26, 2002.